Sebastian Hahn

Real-Time and Embedded Systems Lab
Universität des Saarlandes

The above mail address should continue to work and I am happy to receive interesting mails.

Short CV

I joined the group of Jan Reineke in 2013. Prior to that, I worked on relational cache analysis in the group of Reinhard Wilhelm advised by Daniel Grund. I completed my B.Sc. on relational cache analysis in late 2011. Since 2012, I am a member of the Graduate School of Computer Science at Saarland University. I received my M.Sc. on a formal definition of timing compositionality in early 2015.

Until the end of 2015, I was part of the DFG SFB/TR 14 Automatic Verification and Analysis of Complex Systems working on timing compositionality.
From 2017 on, I work on timing-predictable processor designs and corresponding timing analyses within the DFG project "PEP: Precise and Efficient Prediction of Good Worst-case Performance for Contemporary and Future Architectures".

In April 2019, I defended my doctoral thesis about how to enable compositional analysis by analysis and hardware design as well as the design and implementation of the timing predictable strictly in-order pipeline. From May to September 2019, I worked as a postdoc continuing my research on predictable hardware design as well as exact cache persistence analysis.
From October 2019 on, I work at AbsInt Angewandte Informatik GmbH in the broader field of static program analysis.

Research Interests

If you want to discuss something related to my research interests, please do not hesitate to contact me.


Winter 2016/2017, Winter 2018/2019

Summer 2015, Winter 2017/2018

Summer 2014, Summer 2016, Summer 2017

Winter 2012/2013

Summer 2012

Thesis Advisor


Journal PapersConference and Workshop PapersPhD ThesisMasters ThesisBachelors ThesisOther

Journal Papers

  1. Design and analysis of SIC: a provably timing-predictable pipelined processor core
    S. Hahn and J. Reineke
    Real-Time Systems, November 2019
    [doi] [bib]
  2. Towards compositionality in execution time analysis: definition and challenges
    S. Hahn, J. Reineke, and R. Wilhelm
    SIGBED Review, 12(1), 2015
    [doi] [bib]

Conference and Workshop Papers

  1. LLVMTA: An LLVM-Based WCET Analysis Tool
    S. Hahn, M. Jacobs, N. Hölscher, K. Chen, J. Chen, and J. Reineke
    WCET, 2022
    [doi] [bib]
  2. Cache Persistence Analysis: Finally Exact
    G. Stock, S. Hahn, and J. Reineke
    RTSS, December 2019
  3. Design and Analysis of SIC: A Provably Timing-Predictable Pipelined Processor Core
    S. Hahn and J. Reineke
    RTSS, December 2018
    [pdf] [pdf slides] [bib]
  4. Experimental Evaluation of Cache-Related Preemption Delay Aware Timing Analysis
    D. Shah, S. Hahn, and J. Reineke
    WCET, July 2018
  5. Write-Back Caches in WCET Analysis
    T. Blaß , S. Hahn, and J. Reineke
    ECRTS, 2017
    [doi] [pdf] [pdf slides] [bib]
  6. Enabling Compositionality for Multicore Timing Analysis
    S. Hahn, M. Jacobs, and J. Reineke
    RTNS, October 2016
    [doi] [pdf] [bib]
  7. A Framework for the Derivation of WCET Analyses for Multi-core Processors
    Michael Jacobs, Sebastian Hahn, and Sebastian Hack
    ECRTS, 2016
  8. Toward Compact Abstractions for Processor Pipelines
    S. Hahn, J. Reineke, and R. Wilhelm
    Correct System Design - Symposium in Honor of Ernst-Rüdiger Olderog on the Occasion of His 60th Birthday, Oldenburg, Germany, September 8-9, 2015. Proceedings, 2015
    [doi] [pdf] [bib]
  9. WCET Analysis for Multi-Core Processors with Shared Buses and Event-Driven Bus Arbitration
    Michael Jacobs, Sebastian Hahn, and Sebastian Hack
    RTNS, 2015
  10. Selfish-LRU: Preemption-aware caching for predictability and performance
    J. Reineke, S. Altmeyer, D. Grund, S. Hahn, and C. Maiza
    RTAS, April 2014
    [doi] [pdf] [pdf slides] [bib]
  11. Impact of Resource Sharing on Performance and Performance Prediction: A Survey
    A. Abel, F. Benz, J. Doerfert, B. Dörr, S. Hahn, F. Haupenthal, M. Jacobs, A. Moin, J. Reineke, B. Schommer, and R. Wilhelm
    CONCUR, August 2013
    [doi] [pdf] [bib]
  12. Towards Compositionality in Execution Time Analysis -- Definition and Challenges
    S. Hahn, J. Reineke, and R. Wilhelm
    CRTS, December 2013
    [pdf] [bib]

PhD Thesis

  1. On Static Execution-Time Analysis---Compositionality, Pipeline Abstraction, and Predictable Hardware
    Sebastian Hahn
    Universität des Saarlandes, 2019
    [pdf] [bib]

Masters Thesis

  1. Defining Compositionalty in Execution Time Analysis
    S. Hahn
    Universität des Saarlandes, Germany, 2014
    [pdf] [bib]

Bachelors Thesis

  1. Towards Relational Cache Analysis
    S. Hahn
    Saarland University, 2011


  1. Cache Persistence Analysis: Finally Exact
    G. Stock, S. Hahn, and J. Reineke
    arXiv, abs/1909.04374, 2019

A list of publications can also be found on DBLP.