chi - a Measurement-based Cache Hierarchy Inference Tool
Introduction
chi is a tool to infer parameters of the memory hierarchy by performing a set of measurements on the actual hardware. It can infer the sizes, associativities, block sizes and replacement policies of first- and second-level caches.
The main differentiating feature of chi over other such tools is its ability to model previously undocumented replacement policies.
Download and Installation
You can download a binary Linux version of chi here. It has been tested on various Linux distributions.
After downloading and unzipping, make chi-PC executable, e.g., by executing the following command:
chmod u+x chi-PC
How to use chi
Simply run ./chi-PC
chi will output its inference results on standard out.
If you have run chi on a processor not listed below, please let us know about the results.
Known Inference Results
In the table below, we list parameters inferred by chi on a variety of microarchitectures. If you have applied chi to a microarchitecture not listed below, please let us know!
| L1 Data | L1 Instruction | L2 Unified | |||||||
|---|---|---|---|---|---|---|---|---|---|
| Architecture | Size (KiB) | Associativity | Policy | Size (KiB) | Associativity | Policy | Size (KiB) | Associativity | Policy |
| Intel Atom D525 | 24 | 6 | ATOM | 32 | 8 | PLRU | 512 | 8 | PLRU |
| Intel Pentium 3 900 | 16 | 4 | PLRU | 16 | 4 | PLRU | 256 | 8 | PLRU |
| Intel Core 2 Duo E6300 | 32 | 8 | PLRU | 32 | 8 | PLRU | 2048 | 8 | PLRU |
| Intel Core 2 Duo E6750 | 32 | 8 | PLRU | 32 | 8 | PLRU | 4096 | 16 | see our paper |
| Intel Core 2 Duo E8400 | 32 | 8 | PLRU | 32 | 8 | PLRU | 6144 | 24 | see our paper |
| Intel Core i5 460M | 32 | 8 | PLRU | 32 | 4 | see our paper | 256 | 8 | PLRU |
| Intel Xeon W3550 | 32 | 8 | PLRU | 32 | 4 | see our paper | 256 | 8 | PLRU |
| AMD Athlon 64 X2 4850e | 64 | 2 | LRU | 64 | 2 | LRU | 512 | 16 | see our paper |
| AMD Opteron 8360SE | 64 | 2 | LRU | 64 | 2 | LRU | 512 | 16 | see our paper |
Authors
chi was developed by Andreas Abel as part of his Master's thesis at Saarland University under the direction of Jan Reineke.Presentations
Learning Cache Models by Measurements, [pdf]Presented at Uppsala University, 2012, Uppsala, Sweden.
References
Please see the following papers if you are interested in how chi works:- Reverse Engineering of Cache Replacement Policies in Intel Microprocessors and Their Evaluation (poster abstract)
A. Abel, J. Reineke
ISPASS, 2014. [pdf] [bib]
- Measurement-based Modeling of the Cache Replacement Policy
A. Abel and J. Reineke
RTAS, 2013. [pdf] [slides] [pdf slides] [bib]
- Automatic Cache Modeling by Measurements
A. Abel and J. Reineke
JRWRTC, 2012. [pdf] [bib]
- Measurement-based Inference of the Cache Hierarchy
A. Abel
Universität des Saarlandes, Germany, 2012. [pdf] [bib]