Tools

uops.info:

This website provides more than 200,000 pages with detailed latency, throughput, and port usage data for most x86 instructions on all generations of Intel's Core architecture (i.e., from Nehalem to Coffee Lake). While such data is important for understanding, predicting, and optimizing the performance of software running on these microarchitectures, most of it is not documented in Intel's official processor manuals.

Check it out at: http://uops.info.

Spectector:

Spectector analyzes x64 assembly programs, and it either automatically detects information leaks introduced by speculatively executed instructions or proves the program leak-free.

Check it out at: https://spectector.github.io/.

chi:

chi is a tool to infer parameters of the memory hierarchy by performing a set of measurements on the actual hardware.

Check it out here.

CacheAudit:

CacheAudit is a versatile framework for the automatic, static analysis of cache side channels. CacheAudit takes as input a program binary and a cache configuration, and it derives formal, quantitative security guarantees for a comprehensive set of side-channel adversaries, namely those based on observing cache states, traces of hits and misses, and execution times.

Check it out here.

MeMin:

MeMin is a tool for minimizing incompletely specified Mealy machines.

Check it out here.

PTARM:

The PTARM is our prototype of a precision-timed (PRET) machine.

Please check out our C++ simulator here.

Relacs:

Relacs is a tool for automatic relative competitive and sensitivity analysis of cache architectures.

Check it out here.

Sprattus:

Sprattus is a framework for static and dynamic program analysis of of low-level C and C++ programs on LLVM IR.

Check it out here.