Guillaume Didier

Real-Time and Embedded Systems Lab
Universität des Saarlandes
eMail:
LinkedIn: https://www.linkedin.com/in/guillaumedidierx14/
Phone:
Building: E 1 3 Room: 431
Coordinates: N 49.257833° E 7.045144°

Short CV

I am a postdoc at Saarland University in the group of Prof. Jan Reineke, since January 2025. My research interests include reverse engineering of microarchitectures, and security. I completed my PhD at ENS Paris and IRISA/Inria in January 2023 with a thesis entitled Studying hardware prefetchers using cache side channels.



Teaching

Summer 2025

Winter 2025/2026


Publications

Conference and Workshop Papers


Conference and Workshop Papers

  1. Cache Attacks in Modern/Multi-Socket x86 Systems (Work in Progress)
    G. Didier, A. Lucas, and T. Rokicki
    HS3 2025 - 1st Workshop on Hardware-Supported Software Security, 2025
    [pdf] [pdf slides] [bib]
  2. Characterizing Prefetchers using CacheObserver
    G. Didier, C. Maurice, A. Geimer, and W. Ghandour
    2022 IEEE 34th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Bordeaux, France, November 2-5, 2022, 2022
    [doi] [bib]
  3. Calibration Done Right: Noiseless Flush+Flush Attacks
    G. Didier and C. Maurice
    Detection of Intrusions and Malware, and Vulnerability Assessment - 18th International Conference, DIMVA 2021, Virtual Event, July 14-16, 2021, Proceedings, 2021
    [doi] [bib]